Re: Possible bridges between OO programming proponents and relational model
Date: 15 Jun 2006 11:53:44 -0700
Message-ID: <1150397624.901176.136930_at_g10g2000cwb.googlegroups.com>
> Cimode wrote:
> > paul c wrote:
> >> Cimode wrote:
> >>> paul c wrote:
> >>>> Cimode wrote:
> >>>>> ...
> >>>>>
> >
> > As you said, maybe creating such programming interface may bring a
> > solution...
> > Dual Core architectures implement a closer relation between CPU and IO
> > physical adressing...As they are already programming interfaces to
> > pilot CPU threading and context switching, what makes you think this is
> > impossible?
> > ...
> >
> Heh, heh, now I get it. You're talking about the sticky materials those
> cpus are glued to their boards or heatsinks with!
The media is not the issue. The problem is onto how
> While we're into the non-sequiturs, if you want to talk on a physical
> issue that's becoming more and more of a problem, there's the advent of
> huge L1/L2 cache because ram can't keep up with the latest cpus.
The basic premise of this thread was to suggest that physical issues
may restrict faithfull representation of relvars and asking the
question on whether OO mechanisms could help (maybe through the idea
you suggested of a closer programming interface controlling
representation through N-ary physical scheme)...If I am not mistaken a
non-sequiturs involve false premice. The premice has not been proven
wrong therefore your description is not adequate...
Besides, the fact that RAM has never been able to keep up with CPU is
not related to latest tendancies. Already in X86 architectures at most
30% of potential aws reached..
...I
> I don't think that's fundamental though, reminds me in a way of the little
> windmill generators airlines have for when the main jets fail in mid-flight.
The
Why don't you deepen your initial thought about programming interfaces
instead of using irrelevant analogies.;It's not about power, it's about
architecture...
> p
Received on Thu Jun 15 2006 - 20:53:44 CEST