Layout Designer
Date: Tue, 01 May 2001 19:53:06 GMT
Message-ID: <Xns9094834926EAAtariqnsquarecom_at_64.152.100.100>
Layout Designer: San Diego, CA
Client is looking for a team player capable of working with a highly
competent group of engineers. The IC CAE and Layout team is a small group;
therefore competency within your field and ability to independently perform
a wide array of layout requirements is important. The people, the projects,
and the tools will keep your interest, as well as your career on the edge
of
wireless technology. In this role you will be able to participate in
setting
state-of-the-art layout environment.
Block level layout
Chip floorplanning
Layout verification (DRC, LVS)
Custom digital library layout
Experience/Requirements: Seeking highly motivated self-starter with 2 years
minimum layout experience. Knowledge of Cadence Virtuoso/VirtuosoXL layout
editor and Cadence Diva DRC/LVS layout verification required. Also, layout
experience with submicron processes (0.35um CMOS, 0.25um CMOS). The
following experience would be a plus: analog or mixed signal layout
experience with CMOS, BiCMOS or Bipolar processes and/or Unix.
tariq_at_nsquare.com
Tel: 909 765 1473
Received on Tue May 01 2001 - 21:53:06 CEST