| Oracle FAQ | Your Portal to the Oracle Knowledge Grid | |
 |
 | |||
| Oracle FAQ | Your Portal to the Oracle Knowledge Grid | |
|
| |||
Home -> Community -> Usenet -> comp.databases.theory -> Re: Possible bridges between OO programming proponents and relational model
After doing some google up I realize now the reason of your insistence
onto saying that I would need to define a computational model first is
because of your confusion between logical and physical layer. There
are about a zillion computational models defining operation logical
rules for organizing memory and processes and are specifically targeted
logical implementations.
You are trying to get me to define something totally unuseful to the context of defining the way referencing is defined according to a specific memory bus.
I do not believe that you got the nerve saying that I confuse logical and physical layer.
Besides, I have given serious effort to answer each objection you raised (except the one with insults) but you skipped so many of the questions I have adressed you that it clearly points out your selective attitude into ignoring things that do not fit your perception of what's' right or wrong.
Cimode wrote:
> Bob Badour wrote:
> > Cimode wrote:
> >
> > > Bob Badour wrote:,
> > >
> > >
> > > //> Cimode wrote:
> > >
> > >>>I will be more succint in future comments as wordyness seems to be
> > >>>asource of confusion.
> > >>>
> > >>>Bob Badour wrote:
> > >>>
> > >>>
> > >>>>Cimode wrote:
> > >>>>
> > >>>>
> > >>>>>To Bob Badour
> > >>>>>
> > >>>>>As a proof of good faith that I am not trying to ellide your questions.
> > >>>>>I will change the quoting. Hope this will clarify...
> > >>>>>
> > >>>>>Bob Badour wrote:
> > >>>>><<What are the two dimensions? Can you name them?>>
> > >>>>>For bidimensional RAM's, the 2 dimensions are RowAddress and
> > >>>>>ColumnAddress
> > >>>>>For tridimensional RAM's (64bit architectures) the 3 dimensions are
> > >>>>>Block Adress, RowAddress, ColumnAddress
> > >>>>>
> > >>>>>Does that make sense? It was written above.
> > >>>>
> > >>>>It doesn't make sense yet. First, you will have to define: "RowAddress",
> > >>>>"ColumnAddress" and "BlockAddress" as part of some coherent
> > >>>>computational model.
> > >>>
> > >>>It does not makes *yet*?. Mister, what is nonsense does not make sense
> > >>>*ever*.
> > >>
> > >>I don't recall saying that the above is nonsense. I recall saying it
> > >>cannot make sense until you define the terms "RowAddress",
> > >>"ColumnAddress" and "BlockAddress". Until that time, it is merely
> > >>meaningless.//
> > >
> > > Well in substance, you are saying it is nonsense until it would be
> > > defined. This is totally incoherent.
> > > RowAddress, ColumnAddress and BlockAddress are explicitely defined
> > > through terminology and do not need a definition.
> >
> > The hell they are! At this time in this discussion they are nothing more
> > than meaningless symbols. You have yet to provide any definition or any
> > reference to a definition.
> Meaningless to you only.
>
>> > > theory.
> > >>>Besides when was the last time you checked memory architectures?
> > >>
> > > //I suggest you consider the name of this newsgroup. It is not
> > > comp.intel.architecture.64bit and it is not comp.intel.mmu.64bt//
> > > You have totally ellided that question.
> >
> > I did not answer the question because neither the question nor the
> > answer are relevant. If you expect people here to understand terms that
> > are never used in this newsgroup, you will need to define them or point
> > to some definition. Duh!
> >
> >
> > > The name of this newsgroup is comp.databases.theory and it is a ground
> > > for discussing all theory related to databases including implementation
>> > Of course, I do. We cannot even begin to discuss this topic sensibly
> >
> >
> > >>If you want to discuss a specific computational model, you will have to
> > >>provide some sensible definition of that model. Even with segmented
> > >>memory, the address space is linear. Even with virtual memory, the
> > >>address space is linear. Even with paged memory, the address space is
> > >>linear.
> > >
> > > You keep bringing computational model again.
> >
> >> > > I suggested that this high level not low level.
> > While I told you that segmented memory has nothing to do
> > > with physical addressing scheme for relative position of data.
> >
> > But you have claimed repeatedly that linear addressing is bidimensional
> > and you have stated that this bidimensionality applies to logical
> > entities with N dimensions.
> >
> >
> > >>Are you suggesting that current memory architectures are non-segmented,
> > >>non-virtual, non-paged, non-linear architectures? Are you suggesting
> > >>that this would somehow become relevant to the theoretical computational
> > >>model?
> > >
>
>
 |
 |