CAD Engineer (Layout/Process development)

CAD Engineer (Layout/Process development): San Diego, CA This position will be responsible for support and productivity enhancements of Cadence using Virtuoso/VirtuosoXL layout editor.Client is looking for a team player capable of working with a highly competent group of engineers. The IC CAE and Layout team is a small group; therefore competency within your field and ability to independently perform a wide array of tasks is important. The people, the projects, and the tools will keep your interest, as well as your career on the edge of wireless technology. In this role you will be able to do:
DRC/LVS rules file implementation
Layout pCell development
Cadence support for layout designers
Maintenance of current Cadence infrastructure Experience/Requirements
BS Computer Engineering or BSEE plus 2 years experience supporting or using Cadence design system. Knowledge of Diva or Dracula Layout verification tools. Programming experience using one of more of the following: Skill, LISP, C, C++. Experience writing verification rules (DRC/LVS). Understanding
of CMOS, BiCMOS processes. The following experience would be a plus: Cadence
Virtuoso layout editor and/or digital Place&Route tools, Perl, awk, sed and Unix Shell.
tariq_at_nsquare.com
Tel: 909 765 1473 Received on Tue May 01 2001 - 21:55:22 CEST