Re: Using the RM for ADTs
Date: Sun, 12 Jul 2009 10:28:10 -0400
Message-ID: <aim6m.17760$Dx2.10543_at_flpi146.ffdc.sbc.com>
"David BL" <davidbl_at_iinet.net.au> wrote in message
news:8385d246-9740-4ebb-87f4-a810a80a8090_at_q40g2000prh.googlegroups.com...
> On Jul 12, 2:06 pm, "Brian Selzer" <br..._at_selzer-software.com> wrote:
>
>> This assumes that the circuits being "instantiated" are known ahead of
>> time.
>> How is that knowledge arrived at? Where does it come from?
>
> Circuit designers. In practise tremendous data compression is
> possible. For example a 32 bit ripple carry adder can be built from
> 32 full adders, where each full adder is made from 2 XOR, 2 AND and 1
> OR gate, and each of these gates involves a particular configuration
> of transistors.
>
I'm sorry. I thought you were looking for a more general solution that facilitates the detection of circuits that are structurally equivalent but whose components or nodes just have different identifiers. Received on Sun Jul 12 2009 - 16:28:10 CEST