Re: Demo: Modelling Cost of Travel Paths Between Towns

From: Marshall Spight <mspight_at_dnai.com>
Date: Tue, 16 Nov 2004 17:39:47 GMT
Message-ID: <DXqmd.104518$R05.81824_at_attbi_s53>


"Hugo Kornelis" <hugo_at_pe_NO_rFact.in_SPAM_fo> wrote in message news:qs1dp0h29i85cutpisoavdp0toj91kklvs_at_4ax.com...
>
> A computer represents PA as a string of bits - either 16 or 32 bits on
> most modern computers. If you store PA twice, you have the same string of
> bits in two locations.
>
> If you store PA once, you'll have to replace PA in the above rows with a
> pointer to that location. A computer represents a pointer as a string of
> bits - either 16 or 32 bits on most modern computers. So even if you store
> PA once, you still end up with the same string of bits in two locations.

Of course, in modern instruction set architectures, if the CPU loads a value that represents a *memory* address, the R bit (redundancy) is cleared regardless of the original setting of the flag. If the value represents any part of a *postal* address, (except a suite number,) the R flag is set. So since "PA" is a state, that's part of a postal address. I think you might be confusing memory addresses and postal addresses.

Note: the above is a simplification. If the CPU is using a page-offset addressing mode, then the situation is much more complicated. For example, Intel architectures store the redundancy in the low-order byte, while most others use the high-order byte. Consult your manufacturer's specs if there is any question.

Marshall Received on Tue Nov 16 2004 - 18:39:47 CET

Original text of this message