Re: Using the RM for ADTs

From: Brian Selzer <>
Date: Sun, 12 Jul 2009 02:06:41 -0400
Message-ID: <ubf6m.11508$>

"David BL" <> wrote in message
> On Jul 10, 8:52 pm, "Brian Selzer" <> wrote:
>> Just a thought. It might be worthwhile to think of components
>> recursively.
>> Supposing that identifiers are assigned to simple components and their
>> leads, then nodes are completely defined as collections of component
>> leads.
>> Define a component as one of the following:
>> 1. A simple component.
>> 2. A collection of components connected by a node.
>> Note that a simple component can have 2 or more leads and that a node may
>> only connect one component. For example, a quad, 2-input OR gate that
>> has
>> 14 leads (Vcc, gnd, 8 inputs and 4 outputs), can be transformed into a
>> single 5 input OR gate by connecting the outputs of two of the OR gates
>> to
>> the inputs of a third OR gate, and connecting the output of the third OR
>> gate to an input of the fourth OR gate. Each of the three connections is
>> a
>> node consisting of two leads of the same component.
>> Thinking of components recursively may simplify the pattern matching
>> because each component can then be represented as either a function
>> of 2 or more variables for simple components, or a composition of
>> functions that share variables. For example, suppose that d1(a,b) and
>> d2(c,d) represent simple components (diodes), then d2(c,d) is d2(c,b)
>> by alpha conversion so that or1(a,c,b) can be d1(a,b).d2(c,b), where
>> the node that connects d1 and d2 is represented by the variable b.
> To get reuse one needs to use DAG structures, not trees. For example,
> circuit values could be named in a flat namespace using a relation,
> allowing for arbitrary reuse between those circuits with the
> constraint that there are no cycles. A circuit "instantiates" another
> circuit by name. The most useful circuits tend to instantiated within
> many other circuits.
> A circuit could distinguish between its external and internal nodes,
> allowing the system to have stronger integrity constraints.

This assumes that the circuits being "instantiated" are known ahead of time. How is that knowledge arrived at? Where does it come from? Received on Sun Jul 12 2009 - 08:06:41 CEST

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