Re: Using the RM for ADTs

From: David BL <davidbl_at_iinet.net.au>
Date: Fri, 3 Jul 2009 01:48:51 -0700 (PDT)
Message-ID: <095c8b9d-eb68-4a39-acdf-942d5db07b2e_at_y10g2000prf.googlegroups.com>


On Jul 3, 12:58 pm, "Brian Selzer" <br..._at_selzer-software.com> wrote:
> "David BL" <davi..._at_iinet.net.au> wrote in message

> > Consider a node to which n components are connected and n is large.
> > Using pairwise connections can either be exceedingly arbitrary (by
> > only representing n-1 pairs) or it makes for enormous redundancy (by
> > representing all n(n-1)/2 pairs).
>
> > I think this is much worse that the symmetry problem with resistors.
>
> I see your point, but I still think that assigning components artificial
> identifiers is better: the unordered pairs could be replaced with or
> preprocessed into a single set per node prior to the determination of
> isomorphism. For example,
>
> {resistor1:lead1,capacitor2:lead1,transistor1:lead2}
>
> discribes a node that connects a resistor and a capacitor to the base of a
> transistor.
>
> The above contains the same information as the unordered pairs
>
> {{resistor1:lead1,capacitor2:lead1},
> {resistor1:lead1,transistor1:lead2}}
>
> without either the arbitrariness or the redundancy you seek to avoid.

I cannot tell which approach is better. Anyway, the point I find interesting is that in both cases nesting can ensure the schema meets the given requirements for logical equivalence of circuit values. Received on Fri Jul 03 2009 - 10:48:51 CEST

Original text of this message