Re: Best chip for Oracle AMD, INTEL, SPARC

From: bdbafh <bdbafh_at_gmail.com>
Date: Fri, 11 Jul 2008 09:10:28 -0700 (PDT)
Message-ID: <7a1840fa-a0c6-4fd8-ad92-9c3a46c94263@z66g2000hsc.googlegroups.com>


On Jul 11, 10:02 am, "awatkins1..._at_googlemail.com" <awatkins1..._at_googlemail.com> wrote:
> I know you are going to say that it all depends on the O/S, but if you
> can forget that for the minute, does it matter what the CPU is when
> your are compare the Intel Xeon Quads, AMD Quads and Sun SPARC chips.
>
> Does the cache make a big difference, since you think then SPARC /
> INTEL would be best and you would never consider AMD.
>
> SPARC T2 = 4 MB L2
> UltraSPARC IV = 2MB L2
> INTEL Xeon = 2MB L2
> AMD Opteron = 512K L2
>
> Cheers
>
> Andrew

Cache size is only one part of the overall architecture. Perhaps a large cache is being used in order to try to make up for higher latency (from memory)?
The use of an on-chip memory controller could help to reduce latency as opposed to an off-chip memory controller. How large is the penalty for misses in predictions? How deep is the pipeline?
What is the front-side-bus speed?
What memory speed is supported?

Oh, and how is one to benchmark the CPUs if no OS is loaded?

Here is one such comparison:
http://www.anandtech.com/linux/showdoc.aspx?i=2158

hth.
-bdbafh Received on Fri Jul 11 2008 - 11:10:28 CDT

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