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RE: EMC question

From: Khedr, Waleed <Waleed.Khedr_at_FMR.COM>
Date: Tue, 02 Apr 2002 14:28:48 -0800
Message-ID: <F001.004394C9.20020402142848@fatcity.com>


Take a look at this pdf file and search for 'microcode 5265' :  

http://powerlink.emc.com/MediumFreq/21108_Symmetrix_3832_Installation_Manual .pdf?_requestid=260

Regards,

Waleed

 Any views or opinions presented in this email are solely those of the author and do not necessarily represent those of the company

-----Original Message-----
Sent: Tuesday, April 02, 2002 12:38 PM
To: Multiple recipients of list ORACLE-L

Waleed & list,

To define the terms we have on hand:-
A contiguous meta volume requires the hyper volumes to be sequential. A non-contiguous does not require the hyper volumes to be sequential.

I want to reiterate again that the concept of "pure striping" at the hardware level, is still not there in EMC, even though you have documentation that claims that you do. Let me explain.

When you look at "pure striping", there are 2 aspects to it :-

  1. The read aspect
  2. The write aspect

Take an example of a 4-way striped volume. The read aspect provides us the capability for all 4 drives to independently spin and service I/O from each of the drives. This the EMC device does, after the data has been placed on all hypers that support a meta volume.

The write aspect needs to offer the same functionality. So, if you are writing to 4 distinct blocks (each on 1 disk), then each drive should be able to write 1 block in an independent fashion.

That is where, the EMC hardware striping is not complete. This is because, the 4 blocks that need to be written to the "meta volume" with 4 hypers (regardless of whether it is contiguous or not), will happen in "sequential" fashion. Meaning, to write 4 blocks into the "striped volume", the first block will be written to the first hyper, followed by the second block to the second hyper and so on. As you can see the blocks that need to be written are queued up, so that they are written in a sequential fashion on the underlying hypers. This can and will cause severe write-intensive I/O bottlenecks.

Why is this implemented this way? No specific reasons, except, "that is how it is right now". It has been rumored that microcode 5x68 or 5x69, will do that. Remains to be seen.

So all the EMC "striping" does right now is to alleviate the problem of read-intensive operations not hammering a single drive, provided the data is spread across all the underlying hypers. I am not very familiar with the Engenuity product offering, hence cannot comment on that, but from what I have heard, it is a software-based volume management product.

Best regards,

Gaja


Gaja Krishna Vaidyanatha
Director, Storage Management Products,
Quest Software, Inc.
Co-author - Oracle Performance Tuning 101 http://www.osborne.com/database_erp/0072131454/0072131454.shtml

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Received on Tue Apr 02 2002 - 16:28:48 CST

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